Designing at advanced process nodes requires a new place-and-route paradigm to manage the increasing complexity. Aprisa is a detail-route-centric physical design platform for the modern SoC.
Ravi Ranjan, director of physical design at MaxLinear, talks about using Aprisa for 16 nm and 5 nm designs. For MaxLinear, Aprisa provides ease of use and excellent correlation and integration to third-party tools.
Roma Rudra, technical director at Arm describes how Aprisa addresses their challenges in implementing big infrastructure designs.
Sean Kao, senior principal engineer at indie Semiconductor, describes why Siemens digital implementation services and Aprisa were reliable partners for their challenging designs.