Solido Simulation Suite resources

Learn how SiTime leverages Analog FastSPICE, Symphony and Solido Design Environment ensure seamless integration between the analog and digital components and accelerate verification of high-precision MEMS-based oscillators SoC.

Learn how Allegro MicroSystems leveraged AI-powered Solido Design Environment and Analog FastSPICE to accelerate power management integrated circuit verification, resulting in an overall reduction in verification time.

Watch this session and learn how to leverage AWS cloud capacity for full cloud migration or peak demand expansion for custom integrated circuit verification workloads, and achieve faster time-to-market.

In this session, we provide an in-depth introduction to Analog FastSPICE eXTreme – the latest AFS innovation, designed to remove the post-layout simulation bottleneck.

In this webinar, we provide an in-depth introduction to aging analysis using the CMC industry standard Open Model Interface (OMI) with Fraunhofer Institute for Integrated Circuits, Division Engineering Adaptive Systems EAS.

In this session, we provide an in-depth feel of IC development challenges and how a comprehensive verification solution through our Analog FastSPICE Platform caters to Samsung Foundry’s advanced technology nodes.

Attend this session and learn how recent innovations to the AFS Harmonic Balance (HB) engine are used in conjunction with AFS eXTreme.

User2User: This session highlights how Mixel achieved first-pass silicon success of high-speed low power MIPI PHYs with a robust verification methodology using Analog FastSPICE (AFS-XT) and Symphony. 

User2User: In this session, Analog Bits describes how they use AFS to address the challenges associated with achieving silicon-accurate design and verification on a wide portfolio of PLL's and sensors in advanced processes.

Attend and learn how the Symphony Mixed-Signal platform can help you cut down your debug cycles and improve productivity.

Attend this session and learn how digital-centric mixed-signal verification methodologies, including real number modeling, UVM-AMS and UPF-MS, can be used to improve SoC verification throughput and improve time-to-market.