Program EDA za visokošolsko izobraževanje za programsko opremo

The IC Nanometer Design bundle provides a complete environment for the design, capture, layout and verification of analog, digital and mixed-signal integrated circuits.

The Custom IC design software AMS IC design flow is a complete end-to-end design flow for analog/mixed- signal (AMS) IC designs. Custom IC Design is the updated and improved product designation for the former Tanner suite. The flow consists of highly integrated front and back-end tools, from schematic capture, mixed-signal simulation and waveform probing to physical layout and foundry-compatible physical verification.

The L-Edit MEMS design flow delivers 3D micro-electro-mechanical systems (MEMS) design and fabrication support in one unified environment and makes it easy to integrate MEMS devices with analog/mixed-signal processing circuitry on the same IC.

The Symphony Mixed-Signal technology is a highly configurable mixed-signal solution to accurately verify design functionality, connectivity, and performance across A/D interfaces at all levels of the design hierarchy and for all IC applications. Symphony’s modular architecture leverages Siemens’ Solido SPICE, Solido FastSPICE and Analog FastSPICE (AFS) circuit simulators, part of the Solido Simulation Suite, to provide fast mixed-signal simulation performance with configurable accuracy and high capacity.

The Calibre product line delivers a complete IC verification and DFM optimization platform that speeds designs from creation to manufacturing, addressing all sign-off requirements.

Siemens launched a revolutionary portfolio of design and verification solution called Questa One in 2025.

Questa One includes its flagship simulator called Questa One Sim. It is an indisputable market leader in DFT simulations for complex multi-die SoCs achieving performance gains that are multifold over competition

Questa One Avery VIP is a market leader in verifying cutting edge IP protocols, and it also helps in reducing the turnaround time from verification to emulation

Questa One Stimulus Free Verification augments the total design coverage by using mathematical, stimulus-free analyses to verify complex, high-speed ASIC and FPGA designs

This bundle provides access to a broad spectrum of applications including design creation, requirements tracking, simulation, power, security, equivalence and debug. This includes flagship Questa Prime Sim App, Lint/CDC App, HDL Designer, Requirements Tracer, Power Aware Sim, Check Connect, Verify and Inspect App, Visualizer Debug and more. Finally, this bundle of products also allows users to integrate all their coverage databases in VIQ to see a unified view of total design verification.

Physical register-transfer level (RTL) synthesis for advanced-node designs with Oasys-RTL.

FPGA design and verification – a complete solution comprising HDL design, simulation, hardware/software co-verification and leading FPGA logic and physical synthesis.

Tessent Silicon Test – a complete technology-leading solution for testability analysis, scan, boundary scan and memory test synthesis and automatic test pattern generation

System Modeling – a complete environment for creating and verification of mixed-signal and multilanguage systems, prevalent in aerospace and other industries

Siemens EDA delivers a comprehensive, industry-leading integrated platform for PCB system design and analysis, bridging academia and real-world engineering excellence. By partnering with Siemens EDA, colleges and universities equip students, designers, and engineers with the same cutting-edge solutions trusted by global technology leaders.

The PCB system design and analysis solution includes:

• Seamless schematic capture & circuit design. A fully integrated, intuitive environment designed for rapid capture, simulation, intelligent component selection, and streamlined library management, enabling students to focus on creativity and engineering fundamentals from day one.
• Industry-leading PCB layout tool. Combine ease of use with powerful, automated routing capabilities to master both simple and advanced designs. Benefit from state-of-the-art 3D layout and MCAD collaboration, fostering skills critical for today’s multidisciplinary engineering challenges.
• Integrated constraint management. Enable design precision with "correct-by-construction" workflows that greatly reduce costly board re-spins and prototypes, honing students’ ability to deliver quality from concept to production.
• AI-enhanced workflow with predictive commands. Benefit from intelligent features such as command prediction and natural language-assisted design support that streamline workflows, reduce manual effort, and accelerate learning – enabling users to intuitively navigate complex PCB design processes with greater efficiency and confidence.
• Advanced Analog-Mixed Signal (AMS) circuit simulation. Explore circuit behavior with sophisticated simulation tools that bring practical insight to theoretical learning.

Unmatched analysis and verification with HyperLynx™

The PCB system design and analysis solution is powered by HyperLynx™, the industry’s leading analysis suite. Students gain hands-on experience with:

• Signal and power integrity analysis
• Electrical rule checking
• Full-wave and 3D electromagnetic simulation

HyperLynx equips future engineers to proactively identify and solve critical PCB issues early, drastically reducing iteration cycles.

Xpedition with HyperLynx

Xpedition is the market-leading, enterprise-class PCB design tool used by the biggest names in the industry. Its patented technologies focus on reducing design cycles, PCB resource efficiency and quality of results. This is an enterprise class solution and requires college/university CAD support to set up the environment. This bundle is best suited for programs and courses done in partnership with the industry.

Valor

Valor New Product Introduction (NPI) is the industry-leading PCB design verification tool for all ECAD systems. It helps PCB designers and manufacturers accelerate NPI, improve product quality and eliminate unnecessary design iterations, by identifying issues which could effect PCB fabrication, assembly, or test and allowing them to be corrected early in the design flow, before design data is handed off to manufacturing.

The detailed route-centric Aprisa automatic digital P&R system offers complete functionalities for top-level hierarchical design and block-level physical implementation for complex digital IC design projects. It includes cutting-edge technologies in proto- typing, floor planning, chip assembly, placement, clock tree synthesis (CTS), routing, optimization and embedded analysis engines.

The core of this technology is the detailed route-centric architecture and hierarchical database, specifically developed to address the design challenges with advanced fin field-effect transistor (FinFET) technology.

The Questa Advanced Formal bundle provides access to the best in-class and flagship products of newly announced Questa One Stimulus Free Verification. Applications for security and coverage analyses are included in this bundle. This includes Analyze Fault, Equivalence FPGA, Check Register, Inspect, Verify Secure & Trust, Verify Property, Increase Coverage for ASICs and FPGA applications.

The advanced AMS Verification bundle offers a comprehensive solution for analog and mixed-signal simulation and waveform analysis. Solido™ SPICE is Siemens’ next-generation, feature-rich SPICE simulation technology, providing 2-45X speedup for analog, mixed-signal, RF and 3D IC verification, with foundry certified accuracy. It supports DC, Transient, Transient noise, AC, RF Periodic Steady State (PSS) and RF Harmonic Balance (HB) analyses. The Solido Waveform Analyzer offers an interactive graphical representation of data resulting from mixed-signal simulations and is useful for visualizing, measuring, and analyzing simulation waveforms.

Solido Design Environment (Solido DE) is a comprehensive AI-powered design environment for analog, memory, and standard cell flows that provides a single unified solution for nominal and variation analysis, as well as Solido Waveform Analyzer, an integrated modern waveform viewer. Integrated AI-powered variation-aware verification and optimization technologies enable designers to achieve 3–6+ sigma yield verification orders-of-magnitude faster than traditional brute-force or manual methods, with full SPICE accuracy. Solido Design Environment is silicon-proven and has been used in production by the world’s top semiconductor companies across thousands of tapeouts over 20+ years. Solido continues to innovate in the era of AI with new disruptive technology such as Solido Additive Learning, which retains and reuses AI models from initial verification runs to speed up subsequent iterative verification jobs, providing 3X-20X additional speedups and weeks of production savings, backed by customer case studies.

The Solido Characterization Suite provides fast and accurate library characterization tools powered by artificial intelligence (AI) technologies. This suite reduces standard cell, custom cell, and memory characterization time and resources, while delivering production-accurate .lib models and statistical data, and performing comprehensive validation for characterized .lib files.

IP has many different views (logical, physical, timing, SPICE, etc.) that must be validated standalone and across design views. In addition, with frequent IP revisions, PDK changes, and updates, unexpected alterations in newer versions can lead to costly rollbacks or re-spins. Managing the IP data library is critical to ensure correct and consistent integration. Solido IP Validation Suite consists of Solido Crosscheck and Solido IPdelta, offering in-view and cross-view IP QA, as well as version-to-version IP QA, respectively. Used together, these solutions create a robust IP QA flow, accelerating IP production cycles and helping to maintain a high level of IP quality with each iteration.

The 3D IC Design bundle enables the design and heterogeneous integration of chiplets. The bundle contains software for full flow 3D IC development including Tessent, Aprisa place and route, Innovator 3D technology and Calibre 3D tools.

Please review our Terms and Conditions here.

If your research falls outside the scope of the Higher Education Program but you still require access to Siemens EDA tools, please email EDAAcademic.industry@siemens.com. Siemens EDA offers alternative programs to support your research needs, and we are happy to assist in identifying the most suitable option for you.